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ESD in Silicon Integrated Circuits, 2nd Edition

ISBN: 978-0-471-49871-1

April 2002

424 pages

Description
* Examines the various methods available for circuit protection, including coverage of the newly developed ESD circuit protection schemes for VLSI circuits.
* Provides guidance on the implementation of circuit protection measures.
* Includes new sections on ESD design rules, layout approaches, package effects, and circuit concepts.
* Reviews the new Charged Device Model (CDM) test method and evaluates design requirements necessary for circuit protection.
About the Author

E. Ajith Amerasekera is the author of ESD in Silicon Integrated Circuits, 2nd Edition, published by Wiley. Charvaka Duvvury is the author of ESD in Silicon Integrated Circuits, 2nd Edition, published by Wiley.